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Dave Finnerty

IC Layout Engineer, Physical Designer
  • Suggested rate
    £450 / day
  • Experience8-15 years
  • Response rate100%
  • Response time1 hour
The project will begin once you accept Dave's quote.
Location and workplace preferences
Location
National University of Ireland, Galway, Ireland
Remote only
Primarily works remotely
Verifications
Verified email
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Skill set (7)
Dave in a few words
I am a mixed signal Physical Design Engineer with over 20 years experience in the Semiconductor
industry.
Here is a note to highlight my suitability for a role with you as a Layout Engineer:
• I am vastly experienced in the physical design of PLLs, ADCs, DACs, LDOs, Bandgaps,
ESD structures etc.
• I have an in-depth knowledge of isolation, electro-migration, cross capacitance, matching,
parasitics and IR drop
• I am an expert in most common layout tools in the Cadence suite
• I have vast experience in various verification tools, such as Mentor Calibre, for LVS, DRC,
DFM, Antennae and LPE for multiple foundries and geometries
• I am experienced in floorplanning at block level and at chip level
• I have managed layout teams both locally and remotely, providing a schedule to guarantee
parts are shipped both on time and to a high quality
• I am experienced in working with both remote and local Circuit Designers, communicating
clearly to assess their needs and providing accurate and timely feedback through a variety
of platforms
• I am an EU citizen. I am immediately available to relocate for about a month, to become
familiar with a new project, and to make frequent site visits after that. I am available for
permanent or short term contracts

Further details are available in my attached Curriculum Vitae.

Experience
  • Libourne Consultancy Ltd.
    LAYOUT ENGINEER
    January 2022 - Today (2 years and 10 months)
    Limerick, Ireland
    Working to tight schedules provide Layout Services from floorplanning through to tapeout, using cross-quadding and inter-digitation etc. for foundries such as X-Fab, Tower Jazz and Europractice
    •Back annotate schematics to reflect dummy arrangement, adding the maximum capacitor values that are attained in the layout, editing transistor finger or multiplication arrangement etc.
    •RF Layout, High Voltage Layout
  • IC Resources
    CONTRACT LAYOUT ENGINEER
    January 2020 - January 2021 (1 year)
    United Kingdom
    Worked for various companies on circuits such as opAmps, LDO's, Bandgaps, muxes etc.
    •Worked on processes for X-Fab and Global Foundries
  • ON Semiconductor
    SENIOR LAYOUT DESIGNER
    January 2012 - January 2020 (8 years)
    Raheen, WW, Ireland
    Floorplanned and Scheduled Mixed Signal projects, mainly for the Power and Automotive ADAS markets
    •Reduced layout time and enhanced layout integrity by physically designing blocks in a manner to ensure their re-usability. This greatly reduced new, unwanted factors for each project. This included blocks such as Low Drop Out, (Power FET+DiffAmp), ADC, (Comparators, Digital Encoder), Bandgap, (BiCMOS BJT's), Amplifiers and Current Sources
    •Reduced required personnel resources in projects by floorplanning and creating DEFs for Digital Routing to aid the Digital Implementation Engineer. This included pin placement, blockages, feed-throughs etc. for Innovus. Used Innovus to Place and Route Non-Timing driven blocks.
    •Slashed project schedules by up to 40% by managing remote teams of Layout Designers while liaising with Managers and Design Engineers regarding projects
    •Improved communication by organising and publishing minutes for various meetings including Layout Reviews, ESD Reviews etc.
    •Implemented concrete Process Improvement Initiatives which greatly enhanced the organisation of the Layout team
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